- Collaborative register management and workflows are simplified by SpectaReg
- SpectaReg provides a single source for all auto-generated deliverables including RTL, verification, software, and documentation
PDTi will demonstrate SpectaReg, a web application that enables chip developers to Simplify, Collaborate, Automate™ addressable register interfaces, during The SPIRIT Consortium’s general public meeting on Monday, June 9, at the Anaheim Convention Center from 6:00pm to 9:00pm, at the 2008 Design Automation Conference (DAC).
“At the demo, chip developers will see how SpectaReg dramatically improves collaboration, productivity and quality to reduce overall development costs,” said PDTi President Jeremy Ralph. “SpectaReg’s rich and intuitive user interface runs in a web browser, making it easy to use and learn for the whole team. As a web application, SpectaReg can be deployed on-site or online, making it easy to scale across teams and locations.”
For logic-designers, verification engineers, embedded firmware/software developers, and technical writers who are developing addressable register maps for ICs and FPGAs, SpectaReg is production proven to cut costs and simplify the development process. Legacy register data (in FrameMaker, Word, spreadsheets, and other data formats) can be easily imported into SpectaReg and validated for correctness. The specifications are collaboratively maintained through SpectaReg’s rich and intuitive user interface. Dependant code and documentation are easily generated with a single click.
The list of industry standard on-chip bus interfaces and protocols supported by SpectaReg is rapidly growing for FPGA, ASIC, and ASSP SoC designs. Examples include ARM AMBA AHB/APB, IBM CoreConnect PLB/OPB, Altera Avalon, and more. These interfaces work with a variety of general purpose processors from ARM, Gaisler Research (LEON2/3), Xilinx (MicroBlaze), MIPS, Altera (NIOS II), IBM (PowerPC) and others. The generated code and documentation outputs include Verilog, VHDL, SystemVerilog, C/C++, DITA XML, HTML. For customer-specific requirements SpectaReg can be customized using the open source Python programming language.
SpectaReg utilizes IP-XACT 1.4, as a single source data format for register specifications. IP-XACT 1.4 is The SPIRIT Consortium’s latest official and publicly available set of specifications for Intellectual Property (IP) meta-data and tool interfaces. Since 2004 PDTi has been a reviewing member of The SPIRIT Consortium, a global organization focused on establishing multi-faceted IP and tool integration standards that drive sustainable growth in electronic design. This is the fourth consecutive SPIRIT public meeting that PDTi has attended at DAC.
Related Links:
- PDTi SpectaReg tool for automating Register Interfaces
- PDTi SpectaReg.com
- The SPIRIT Consortium
- The Design Automation Conference (DAC)
Productivity Design Tools, PDTi, Productive-EDA, the Productivity Design Tools logo, SpectaGen, SpectaGen Framework, SpectaReg and the stylized Productivity Design Tools (and PDTi) logo and all other words that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of PDTi in the U.S. and other countries. All other product or service names are the property of their respective holder.
Tags: ip reuse, IP-XACT, register generation, register-map, SPIRIT Consortium, webApp