Industry Memberships

OASIS DITA Semiconductor Information Design Sub-Committee

The Darwin Information Typing Architecture (DITA) is an XML-based, end-to-end architecture for authoring, producing, and delivering readable information as discrete, typed topics. DITA provides significant advantages for managing readable information and reusing information in many different combinations and deliverables.

The DITA Semiconductor Information Design Sub-Committee (SIDSC) represents a community of interest within various semiconductor companies who believe that there is value in creating a DITA specialization for the industry. Not only will this enable better integration with the development of the OASIS DITA Standard, but will provide end-customers with more value. This will provide an opportunity for reduced in-house development costs, reduced work for integrating third party IP, and increased customer reach by enabling customers to find products quickly. PDTi President, Jeremy Ralph, is a founding member of the SIDSC.

SPIRIT Consortium

Since 2004 PDTi has been a reviewing member of the SPIRIT Consortium, a global organization focused on establishing multi-faceted IP/tool integration standards that drive sustainable growth in electronic design. It is comprised of leading EDA, IP, system integration, and semiconductor companies dedicated to the adoption of a unified set of specifications for configuring, integrating, and verifying IP in advanced SoC design tool sets.

The SPIRIT Consortium officially incorporated as an open, independent, California non-profit organization in July 2006. It announced an enhanced future roadmap covering topics such as debugging, hardware constraints, documentation, and register-description formats. Steps to create alignments with Si2 and SystemRDL in line with the future scope of The Consortium have also been announced. IP-XACT, The Consortium's official set of specifications for IP meta-data and tool interfaces, has been released to the public and is currently in review with IEEE Working Group P1685.

SystemVerilog

IEEE 1800 SystemVerilog is the industry's first unified hardware description and verification language (HDVL) standard. SystemVerilog is a major extension of the established IEEE 1364 Verilog language. It was developed originally by Accellera to dramatically improve productivity in the design of large gate-count, IP-based, bus-intensive chips. SystemVerilog is targeted primarily at the chip implementation and verification flow, with powerful links to the system-level design flow. SystemVerilog has been adopted by 100's of semiconductor design companies and is supported by more than 75 EDA, IP and training solutions worldwide.

Technology Partners

Aldec

Aldec, Inc., established in 1984, is committed to delivering high-performance, HDL-based design verification software for UNIX, Linux, Solaris and Windows platforms. PDTi collaborates with Aldec to validate that SpectaReg-generated VHDL design and verification models, can be simulated using Aldec's Active-HDL and Riviera simulators.

Mentor Graphics

Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies.

PDTi participates in the Questa Vanguard Program (QVP) which Mentor has established to bring customers world-class product integrations and interoperability to enhance their Questa verification options and build a strong and comprehensive SystemVerilog ecosystem.

The Mentor Graphics® Advanced Verification Methodology is the first, true, system-level-to-RTL verification methodology that allows adopters to apply leading-edge verification technologies to designs at multiple levels of abstraction, using multiple languages. The AVM provides libraries of base classes and modules in open-source form and uses TLM interfaces as the communication mechanism between verification components.

Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design.

PDTi participates in Synopsys' SystemVerilog Catalyst Program, which promotes the development and use of EDA tools, verification IP, and training services supporting the SystemVerilog standard for design and verification.

Xilinx

Xilinx, Inc. is the worldwide leader of programmable logic solutions.

PDTi participates in the Xilinx Alliance Program (XAP). This program assures the best available "total solutions" combining Xilinx programmable logic with key technologies from XAP members, including IP cores, EDA, DSP and embedded development tools, design services, board-level products, integrated circuits, and electronic components.