PDTi SpectaReg Web2.0 Application Simplifies Icron's ExtremeUSB Chip Development for Addressable Registers
Submitted by PDTi on Tue, 2008-09-16 13:50. Category: Press ReleasesVancouver, BC, Canada -- September 16, 2008 -- PDTi™ the pioneer in providing innovative electronic design automation (EDA) web applications for the collaborative development of on-chip register interfaces and auto-generation of critical development deliverables, today announced that PDTi SpectaReg™ has dramatically simplified Icron's ITC 2001 ExtremeUSB 2.0 Bridging ASIC development for addressable registers.
PDTi to Demonstrate SpectaReg Web Application for Simplifying Register Interfaces using IP-XACT 1.4 at DAC SPIRIT Meeting
Submitted by PDTi on Tue, 2008-05-13 03:19. Category: Press ReleasesPDTi will demonstrate SpectaReg, a web application that enables chip developers to Simplify, Collaborate, Automate™ addressable register interfaces, during The SPIRIT Consortium’s general public meeting at the 2008 Design Automation Conference (DAC).
PDTi SpectaReg cuts development time for Spectrum Signal Processing's Latest Embedded Radio Module
Submitted by PDTi on Wed, 2007-12-05 13:00. Category: Press Releases• SpectaReg simplifies collaboration between software, verification, hardware and documentation teams
• Short learning curve and easy integration provides Spectrum with dramatically shortened time to market
Vancouver, BC, Canada -- December 5, 2007 -- PDTi™ the leading provider of chip development tools for collaboratively managing register-map specifications and auto-generating code and documentation, today announced that by adopting PDTi SpectaReg™ for a recently completed project, Spectrum Signal Processing by Vecima has successfully reduced their hardware and software register development time.
How to simplify the process of specifying register-maps and auto-generating code and other deliverables.
Category: Programmable Logic DesignLineIn creating run-time configurable slave components, the register-map design pattern is often used; SpectaReg can automate away your register-map headaches.
PDTi Expands Management, Industry Veterans Join Advisory Board
Submitted by PDTi on Tue, 2006-12-19 14:00. Category: Press ReleasesVancouver BC, Canada, December 19, 2006 - Productivity Design Tools (PDTi), a provider of electronic system level (ESL) tools for FPGA and ASSP development teams, today announced the hiring of Ian Hyatt as the Director of Software Development, and the appointment of Barry Jinks and Peter Wilson to PDTi's Advisory Board.
Productivity Design Tools tackles chip-development productivity and IP reuse issues through ESL tools
Submitted by PDTi on Mon, 2005-09-26 14:00. Category: Press Releases* ESL software generates soft-IP from XML-based specifications
Vancouver BC, Canada -- September 26, 2005 -- Productivity Design Tools (PDTi), a new electronics design automation (EDA) company, today announced that it is developing electronic system level (ESL) software that manages specifications, enabling system-on-a-chip (SoC) developers to automate all aspects of code and documentation generation. PDTi provides chip developers with an extensible tool-based methodology that enables project-wide synchronization, automated re-engineering, and improved opportunities for reuse. The privately funded Company is focused on achieving efficiency improvements in chip development through better abstraction and reuse.
Spec foul-ups fuel an EDA startup
Category: EETimesAfter observing problems with managing specifications in chip-design environments, engineer-turned-entrepreneur Jeremy Ralph launched a company to provide electronic system-level (ESL) design tools that automatically generate code and documentation from specifications.
Productivity Design Tools Joins Micronet
Category: Micronet R&D NewsletterProductivity Tools Joins Micronet, a Canada-wide network of researchers from universities, industry and government research organizations working towards the development of the next generation of microelectronic systems.
