Ralph is the president of Productivity Design Tools Inc. (Vancouver, British Columbia), which this week will announce development of SpectaReg, a soft intellectual-property (IP) generator for memory-mapped registers. SpectaReg takes in high-level XML specifications and generates various "views" needed for hardware and software design, including RTL code, a testbench, assertions, C header files for device drivers, and documentation.

Ralph was formerly a chip designer at West Bay Semiconductors, a Vancouver startup that was developing ASSP chips for Sonet/SDH optical networking. Intel acquired the company in 2003, and Ralph stuck with Intel for about nine months until he decided he'd really rather work with a startup.

"I thought about the work I had been doing and where there was a need," Ralph said. "Based on my experience, I saw that people were too often repeating work. Everyone was working from the same specification, but from different versions, and sometimes things were not synchronized."

It was too easy, Ralph noted, to change something in the design and forget to update the specification. "That means the guy in verification was trying to test the wrong thing," he said. "There's a lot of wasted time and effort."

Ralph incorporated Productivity Design Tools (www.productive-eda.com) last year on his own, and he has since brought in several contractors to help out. He was the primary developer of the SpectaReg's underlying technology, the SpectaGen Framework, an engine that generates hardware and software views from high-level specifications. SpectaReg, basically a customized version of that framework aimed specifically at memory-mapped registers, is going into beta sites now and is expected to ship early next year.

"I've had the entrepreneurial spirit since I was young, but this is the first time I've really gone at it with full force," said Ralph. It's also the first time he's been associated with a tool development company, although he wrote some "ad hoc" tools while employed as a chip designer.