PDTi

The register-map pattern is widespread in ASSP, ASIC, SoC and FPGA design. This article is based on an FPGA-based embedded system using Altera’s SOPC Builder and NIOS II soft-processor. The concepts described in the article also apply to an ASIC flow and to FPGA systems that use other embedded processors. To illustrate these concepts the article describes a slave component – a simple programmable traffic light controller (TLC).

• http://www.pldesignline.com/howto/showArticle.jhtml?articleID=198700868