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	<title>PDTi</title>
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	<description>Register management simplified</description>
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		<title>ARRIS Implements PDTi&#8217;s Register Management Web Application Tool</title>
		<link>http://www.productive-eda.com/arris-implements-pdti-register-management-web-application-tool/</link>
		<comments>http://www.productive-eda.com/arris-implements-pdti-register-management-web-application-tool/#comments</comments>
		<pubDate>Wed, 23 Jun 2010 12:30:16 +0000</pubDate>
		<dc:creator>jl</dc:creator>
				<category><![CDATA[Press Releases]]></category>
		<category><![CDATA[Altera Avalon]]></category>
		<category><![CDATA[ARRIS]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[register automation]]></category>
		<category><![CDATA[register generation]]></category>
		<category><![CDATA[register interface]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[SaaS]]></category>
		<category><![CDATA[webApp]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/?p=658</guid>
		<description><![CDATA[Vancouver, BC, June 23, 2010 &#8212; PDTi, an innovative provider of design automation products for hardware/software interface development, today announced that ARRIS, a global communications technology company, has selected and implemented PDTi&#8217;s state-of-the-art register management and collaboration tool to streamline FPGA design for ARRIS advanced broadband network hardware products.
&#8220;The feature rich products which make ARRIS [...]]]></description>
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		<title>PDTi now a Synopsys System-Level Catalyst Member</title>
		<link>http://www.productive-eda.com/pdti-now-a-synopsys-system-level-catalyst-member/</link>
		<comments>http://www.productive-eda.com/pdti-now-a-synopsys-system-level-catalyst-member/#comments</comments>
		<pubDate>Mon, 03 May 2010 23:07:23 +0000</pubDate>
		<dc:creator>jl</dc:creator>
				<category><![CDATA[Web Release]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[esl tools]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[register automation]]></category>
		<category><![CDATA[register interface]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[SaaS]]></category>
		<category><![CDATA[Synopsys Confirma]]></category>
		<category><![CDATA[Synopsys DesignWare]]></category>
		<category><![CDATA[Synopsys Innovator]]></category>
		<category><![CDATA[webApp]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/?p=648</guid>
		<description><![CDATA[
SpectaReg integrates register management with Synopsys system-level tools for virtual prototyping, early software development/debug, IP library integration, and protocol support
VANCOUVER, BC – (May 3, 2010) – PDTi, an innovative provider of design automation products for hardware/software interface development, today announced it has become a member of the Synopsys System-Level Catalyst Program, providing further integration and [...]]]></description>
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		<slash:comments>0</slash:comments>
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		<item>
		<title>PDTi Joins Altera&#8217;s ACCESS Program</title>
		<link>http://www.productive-eda.com/pdti-joins-alteras-access-program/</link>
		<comments>http://www.productive-eda.com/pdti-joins-alteras-access-program/#comments</comments>
		<pubDate>Mon, 22 Jun 2009 21:00:14 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Press Releases]]></category>
		<category><![CDATA[Altera Avalon]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[register automation]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[SaaS]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=225</guid>
		<description><![CDATA[
PDTi SpectaReg.com Augments Altera Design Flow, Providing Zero-Maintenance SaaS Capability
VANCOUVER, BC&#8211;(Marketwire &#8211; June 22, 2009) &#8211;  PDTi, an innovative provider of Software-as-a-Service (SaaS) electronic design automation products, today announced it has joined Altera&#8217;s ACCESS Program, and will provide SpectaReg, the industry&#8217;s most cost-effective, web-based register design automation tool, to customers using Altera devices, including [...]]]></description>
		<wfw:commentRss>http://www.productive-eda.com/pdti-joins-alteras-access-program/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
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		<item>
		<title>Nethra Imaging Adopts PDTi&#8217;s SaaS Tool for New Multi-Core SoC</title>
		<link>http://www.productive-eda.com/nethra-imaging-adopts-pdtis-saas-tool-for-new-multi-core-soc/</link>
		<comments>http://www.productive-eda.com/nethra-imaging-adopts-pdtis-saas-tool-for-new-multi-core-soc/#comments</comments>
		<pubDate>Mon, 01 Jun 2009 20:00:09 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Press Releases]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[register generation]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[SaaS]]></category>
		<category><![CDATA[signal processing]]></category>
		<category><![CDATA[webApp]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=229</guid>
		<description><![CDATA[
SpectaReg.com Web Based HW/SW Interface Automation Cuts Development Time and Costs
VANCOUVER, BC&#8211;(Marketwire &#8211; June 1, 2009) &#8211;  PDTi, an innovative provider of Software-as-a-Service (SaaS) electronic design automation products, today announced that SpectaReg.com, the industry&#8217;s first true SaaS hardware/software electronic design automation (EDA) tool, has been successfully adopted by Nethra Imaging, a leading imaging and [...]]]></description>
		<wfw:commentRss>http://www.productive-eda.com/nethra-imaging-adopts-pdtis-saas-tool-for-new-multi-core-soc/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>ChipStart Begins Distributing PDTi SpectaReg EDA Tool</title>
		<link>http://www.productive-eda.com/chipstart-begins-distributing-pdti-spectareg-eda-tool/</link>
		<comments>http://www.productive-eda.com/chipstart-begins-distributing-pdti-spectareg-eda-tool/#comments</comments>
		<pubDate>Thu, 30 Apr 2009 16:00:21 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Press Releases]]></category>
		<category><![CDATA[register automation]]></category>
		<category><![CDATA[register interface]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[SaaS]]></category>
		<category><![CDATA[webApp]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=222</guid>
		<description><![CDATA[
Partnership Focused on Driving SaaS model as a Standard for On-Chip Register Automation
Palo Alto, California, April 30, 2009 &#8211; ChipStart LLC, a semiconductor intellectual property solution company, announced it will begin distributing PDTi’s SpectaReg on-chip register automation tool which uses a Software-as-a-Service (SaaS) model.

With a growing number of point EDA tools becoming available, the need [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>PDTi CEO Presents at DVCon SaaS &amp; Cloud Computing Round Table</title>
		<link>http://www.productive-eda.com/pdti-ceo-presents-at-dvcon-saas-cloud-computing-round-table/</link>
		<comments>http://www.productive-eda.com/pdti-ceo-presents-at-dvcon-saas-cloud-computing-round-table/#comments</comments>
		<pubDate>Thu, 05 Mar 2009 12:01:24 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Web Release]]></category>
		<category><![CDATA[register automation]]></category>
		<category><![CDATA[SaaS]]></category>
		<category><![CDATA[webApp]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=220</guid>
		<description><![CDATA[PDTi President, Jeremy Ralph presented on using Software-as-a-Service (SaaS) for addressable register automation at the DVCon SaaS &#38; Cloud Computing Round Table on Wed Feb 25th, 2009. A recording of the presentation is available at the PDTi RegisterBits blog.
]]></description>
		<wfw:commentRss>http://www.productive-eda.com/pdti-ceo-presents-at-dvcon-saas-cloud-computing-round-table/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>PDTi SpectaReg Web2.0 Application Simplifies Icron&#8217;s ExtremeUSB Chip Development for Addressable Registers</title>
		<link>http://www.productive-eda.com/pdti-spectareg-web2-0-application-simplifies-icrons-extremeusb-chip-development-for-addressable-registers/</link>
		<comments>http://www.productive-eda.com/pdti-spectareg-web2-0-application-simplifies-icrons-extremeusb-chip-development-for-addressable-registers/#comments</comments>
		<pubDate>Tue, 16 Sep 2008 20:50:21 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Press Releases]]></category>
		<category><![CDATA[customer success]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[register interface]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[RTL]]></category>
		<category><![CDATA[SaaS]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=217</guid>
		<description><![CDATA[
• SpectaReg formalises collaborative register workflows for Icron, improving cohesion across the development teams, reducing manual work
Vancouver, BC, Canada &#8212; September 16, 2008 &#8212;  PDTi™ the pioneer in providing innovative electronic design automation (EDA) web applications for the collaborative development of on-chip register interfaces and auto-generation of critical development deliverables, today announced that PDTi [...]]]></description>
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		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>PDTi to Demonstrate SpectaReg Web Application for Simplifying Register Interfaces using IP-XACT 1.4 at DAC SPIRIT Meeting</title>
		<link>http://www.productive-eda.com/pdti-to-demonstrate-spectareg-web-application-for-simplifying-register-interfaces-using-ip-xact-1-4-at-dac-spirit-meeting/</link>
		<comments>http://www.productive-eda.com/pdti-to-demonstrate-spectareg-web-application-for-simplifying-register-interfaces-using-ip-xact-1-4-at-dac-spirit-meeting/#comments</comments>
		<pubDate>Tue, 13 May 2008 10:19:54 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Web Release]]></category>
		<category><![CDATA[ip reuse]]></category>
		<category><![CDATA[IP-XACT]]></category>
		<category><![CDATA[register generation]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[SPIRIT Consortium]]></category>
		<category><![CDATA[webApp]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=213</guid>
		<description><![CDATA[
Collaborative register management and workflows are simplified by SpectaReg
SpectaReg provides a single source for all auto-generated deliverables including RTL, verification, software, and documentation

PDTi will demonstrate SpectaReg, a web application that enables chip developers to Simplify, Collaborate, Automate™ addressable register interfaces, during The SPIRIT Consortium’s general public meeting on Monday, June 9, at the Anaheim Convention [...]]]></description>
		<wfw:commentRss>http://www.productive-eda.com/pdti-to-demonstrate-spectareg-web-application-for-simplifying-register-interfaces-using-ip-xact-1-4-at-dac-spirit-meeting/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>PDTi SpectaReg cuts development time for Spectrum Signal Processing&#8217;s Latest Embedded Radio Module</title>
		<link>http://www.productive-eda.com/pdti-spectareg-cuts-development-time-for-spectrum-signal-processings-latest-embedded-radio-module/</link>
		<comments>http://www.productive-eda.com/pdti-spectareg-cuts-development-time-for-spectrum-signal-processings-latest-embedded-radio-module/#comments</comments>
		<pubDate>Wed, 05 Dec 2007 20:00:40 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[Press Releases]]></category>
		<category><![CDATA[Altera Avalon]]></category>
		<category><![CDATA[AMBA]]></category>
		<category><![CDATA[customer success]]></category>
		<category><![CDATA[embedded software]]></category>
		<category><![CDATA[FPGA]]></category>
		<category><![CDATA[IP-XACT]]></category>
		<category><![CDATA[register-map]]></category>
		<category><![CDATA[signal processing]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=208</guid>
		<description><![CDATA[
SpectaReg simplifies collaboration between software, verification, hardware and documentation teams
Short learning curve and easy integration provides Spectrum with dramatically shortened time to market

Vancouver, BC, Canada &#8212; December 5, 2007 &#8212;  PDTi™ the leading provider of chip development tools for collaboratively managing register-map specifications and auto-generating code and documentation, today announced that by adopting PDTi [...]]]></description>
		<wfw:commentRss>http://www.productive-eda.com/pdti-spectareg-cuts-development-time-for-spectrum-signal-processings-latest-embedded-radio-module/feed/</wfw:commentRss>
		<slash:comments>0</slash:comments>
		</item>
		<item>
		<title>How to simplify the process of specifying register-maps and auto-generating code and other deliverables.</title>
		<link>http://www.productive-eda.com/how-to-simplify-the-process-of-specifying-register-maps-and-auto-generating-code-and-other-deliverables/</link>
		<comments>http://www.productive-eda.com/how-to-simplify-the-process-of-specifying-register-maps-and-auto-generating-code-and-other-deliverables/#comments</comments>
		<pubDate>Thu, 29 Mar 2007 00:10:11 +0000</pubDate>
		<dc:creator>admin</dc:creator>
				<category><![CDATA[In the Media]]></category>
		<category><![CDATA[Technical Articles]]></category>

		<guid isPermaLink="false">http://www.productive-eda.com/wp/?p=203</guid>
		<description><![CDATA[
The register-map pattern is widespread in ASSP, ASIC, SoC and FPGA design. This article is based on an FPGA-based embedded system using Altera&#8217;s SOPC Builder and NIOS II soft-processor. The concepts described in the article also apply to an ASIC flow and to FPGA systems that use other embedded processors. To illustrate these concepts the [...]]]></description>
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		<slash:comments>0</slash:comments>
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