PDTi

A Component has a memory-mapped register interface which handshakes an on-chip interconnect (like ARM AMBA, Altera Avalon, IBM CoreConnect, OCP-IP, and more). SpectaReg's representation of a component aligns with the IP-XACT standard XML schema. A Component has a SpectaReg-generated register block with the following interfaces: i) a sequential bus interface for software, and ii) a parallel register specific I/O interface for connecting to custom logic. This methodology aligns with the IP-XACT standard for SoC metadata and promotes maximum Component modularity, reuse, and maintainability.