ARRIS Implements PDTi’s Register Management Web Application Tool

June 23rd, 2010

Vancouver, BC, June 23, 2010 — PDTi, an innovative provider of design automation products for hardware/software interface development, today announced that ARRIS, a global communications technology company, has selected and implemented PDTi’s state-of-the-art register management and collaboration tool to streamline FPGA design for ARRIS advanced broadband network hardware products.

“The feature rich products which make ARRIS a leader in quad-play broadband products require a complex design flow. Creating a synchronized and collaborative methodology between our talented hardware and software teams is essential to provide high quality designs,” said Kurt Hedlund, Director of Hardware Development at ARRIS. “We recognized some time ago the many benefits of register map automation and PDTi’s SpectaReg tool provides us with new capabilities. SpectaReg was up and running quickly and it has been very easy for us to integrate it into our design flow.”

SpectaReg is an essential web application that dramatically streamlines and improves the development of register maps. Every facet of hardware/software interface development, including documentation, is faster with a tool such as SpectaReg, and its use results in increased accuracy and reduced engineering workload. SpectaReg provides a single source for all register-related work and code generation.

The tool’s web-application architecture provides easy access for every team member across projects and locations on any compute platform. New levels of productivity are achieved for RTL designers through a correct-by-construction GUI and auto-generation of VHDL and Verilog. Firmware schedules are shortened with accurate and consistent register abstractions in C/C++ for IP integration, driver design and testing. Hardware Verification is simplified with automatically generated system and block-level tests. SpectaReg is available onsite for companies who want complete in-house control and customization, or online to deliver the benefits of register management and SaaS (Software as a Service) to design teams of all sizes.

“We are excited to work with ARRIS. They are experienced register management tool users and went through a thorough evaluation of SpectaReg, making sure their requirements were met,” said Jeremy Ralph, CEO of PDTi. “It’s gratifying to see SpectaReg’s combination of simplicity and advanced features, including items such as hierarchical register maps and interoperability with Altera Avalon and SOPC builder, recognized by a leading company like ARRIS.”

SpectaReg Online Evaluation

SpectaReg can be easily evaluated online using a standard web-browser. For an evaluation, sign up at http://productive-eda.com.

About PDTi

PDTi provides EDA products for Register Management, which dramatically improve chip design by accelerating development while reducing the risk of errors. The company is an innovator in simplifying and automating the critical hardware/software interface development process and a leader in bringing SaaS to EDA. The company has a diverse set of skills across front-end chip hardware and firmware design, uniquely combined with expertise in web application development. PDTi is located in Vancouver, British Columbia, Canada. For more information on PDTi visit http://productive-eda.com.

About ARRIS

ARRIS is a global communications technology company specializing in the design, engineering and supply of technology supporting quad- play broadband services for residential and business customers around the world. The company supplies broadband operators with the tools and platforms they need to deliver carrier-grade telephony, demand-driven video, next-generation advertising, network and workforce management solutions, access and transport architectures and ultra high-speed data services. Headquartered in Suwanee, Georgia, USA, ARRIS has R&D centers in Suwanee; Beaverton, Oregon; Chicago, Illinois; Kirkland, Washington; State College, Pennsylvania; Wallingford, Connecticut; Waltham, Massachusetts; Cork, Ireland; and Shenzhen, China, and operates support and sales offices throughout the world. Information about ARRIS products and services can be found at www.arrisi.com.

PDTi now a Synopsys System-Level Catalyst Member

May 3rd, 2010

SpectaReg integrates register management with Synopsys system-level tools for virtual prototyping, early software development/debug, IP library integration, and protocol support

VANCOUVER, BC – (May 3, 2010) – PDTi, an innovative provider of design automation products for hardware/software interface development, today announced it has become a member of the Synopsys System-Level Catalyst Program, providing further integration and validation between SpectaReg, the industry’s leading register management and collaboration tool and a number of Synposys products including Innovator, Confirma and DesignWare.

Read the rest of this entry »

PDTi Joins Altera’s ACCESS Program

June 22nd, 2009

PDTi SpectaReg.com Augments Altera Design Flow, Providing Zero-Maintenance SaaS Capability

VANCOUVER, BC–(Marketwire – June 22, 2009) – PDTi, an innovative provider of Software-as-a-Service (SaaS) electronic design automation products, today announced it has joined Altera’s ACCESS Program, and will provide SpectaReg, the industry’s most cost-effective, web-based register design automation tool, to customers using Altera devices, including Altera’s Stratix® IV GX GX and Arria® II GX devices.

Read the rest of this entry »

Nethra Imaging Adopts PDTi’s SaaS Tool for New Multi-Core SoC

June 1st, 2009

SpectaReg.com Web Based HW/SW Interface Automation Cuts Development Time and Costs

VANCOUVER, BC–(Marketwire – June 1, 2009) – PDTi, an innovative provider of Software-as-a-Service (SaaS) electronic design automation products, today announced that SpectaReg.com, the industry’s first true SaaS hardware/software electronic design automation (EDA) tool, has been successfully adopted by Nethra Imaging, a leading imaging and video solutions company, for the design of their latest multi-core SoC.

Read the rest of this entry »

ChipStart Begins Distributing PDTi SpectaReg EDA Tool

April 30th, 2009

Partnership Focused on Driving SaaS model as a Standard for On-Chip Register Automation

Palo Alto, California, April 30, 2009 – ChipStart LLC, a semiconductor intellectual property solution company, announced it will begin distributing PDTi’s SpectaReg on-chip register automation tool which uses a Software-as-a-Service (SaaS) model.

Read the rest of this entry »

PDTi CEO Presents at DVCon SaaS & Cloud Computing Round Table

March 5th, 2009

PDTi President, Jeremy Ralph presented on using Software-as-a-Service (SaaS) for addressable register automation at the DVCon SaaS & Cloud Computing Round Table on Wed Feb 25th, 2009. A recording of the presentation is available at the PDTi RegisterBits blog.

PDTi SpectaReg Web2.0 Application Simplifies Icron’s ExtremeUSB Chip Development for Addressable Registers

September 16th, 2008

• SpectaReg formalises collaborative register workflows for Icron, improving cohesion across the development teams, reducing manual work

Vancouver, BC, Canada — September 16, 2008 — PDTi™ the pioneer in providing innovative electronic design automation (EDA) web applications for the collaborative development of on-chip register interfaces and auto-generation of critical development deliverables, today announced that PDTi SpectaReg™ has dramatically simplified Icron’s ITC 2001 ExtremeUSB 2.0 Bridging ASIC development for addressable registers.

Read the rest of this entry »

PDTi to Demonstrate SpectaReg Web Application for Simplifying Register Interfaces using IP-XACT 1.4 at DAC SPIRIT Meeting

May 13th, 2008

  • Collaborative register management and workflows are simplified by SpectaReg
  • SpectaReg provides a single source for all auto-generated deliverables including RTL, verification, software, and documentation

PDTi will demonstrate SpectaReg, a web application that enables chip developers to Simplify, Collaborate, Automate™ addressable register interfaces, during The SPIRIT Consortium’s general public meeting on Monday, June 9, at the Anaheim Convention Center from 6:00pm to 9:00pm, at the 2008 Design Automation Conference (DAC).

Read the rest of this entry »

PDTi SpectaReg cuts development time for Spectrum Signal Processing’s Latest Embedded Radio Module

December 5th, 2007

  • SpectaReg simplifies collaboration between software, verification, hardware and documentation teams
  • Short learning curve and easy integration provides Spectrum with dramatically shortened time to market

Vancouver, BC, Canada — December 5, 2007 — PDTi™ the leading provider of chip development tools for collaboratively managing register-map specifications and auto-generating code and documentation, today announced that by adopting PDTi SpectaReg™ for a recently completed project, Spectrum Signal Processing by Vecima has successfully reduced their hardware and software register development time.

Read the rest of this entry »

How to simplify the process of specifying register-maps and auto-generating code and other deliverables.

March 28th, 2007

The register-map pattern is widespread in ASSP, ASIC, SoC and FPGA design. This article is based on an FPGA-based embedded system using Altera’s SOPC Builder and NIOS II soft-processor. The concepts described in the article also apply to an ASIC flow and to FPGA systems that use other embedded processors. To illustrate these concepts the article describes a slave component – a simple programmable traffic light controller (TLC).


Browser based for a better experience

  • Any client, anywhere
  • Easy scaling
  • Central management and set-up

Internal tool? Benefit from SpectaReg

  • State-of-the art EDA
  • Error free code & documentation
  • Increased efficiency
  • Latest industry standards and protocols

SpectReg online might be right for you

  • Affordable for smaller teams and projects
  • No internal infrastructure or support needed
  • Large projects scale across teams & locations